Four Output Clock Generator/Jitter Cleaner with Integrated Dual VCOs

Description

The CDCE62002 is a high performance clock generator featuring low output jitter, a high degree of configurability via a SPI interface, and programmable start up modes determined by on-chip EEPROM. Specifically tailored for clocking data converters and high-speed digital signals, the CDCE62002 achieves jitter performance under 0.5 ps RMS10 kHz to 20 MHz integration bandwidth.. It incorporates a synthesizer block with partially integrated loop filter, a clock distribution block including programmable output formats, and an input block featuring an innovative smart multiplexer. The clock distribution block includes two individually programmable outputs that can be configured to provide different combinations of output formats (LVPECL, LVDS, LVCMOS).

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Features

• Frequency Synthesizer With PLL/VCO and Partially Integrated Loop Filter
• Fully Configurable Outputs Including Frequency and Output Format
• Smart Input Multiplexer Automatically Switches Between one of two Reference Inputs.
• Multiple Operational Modes Include Clock Generation via Crystal, SERDES Startup Mode,
  Jitter Cleaning, and Oscillator Based Holdover Mode.
• Integrated EEPROM Determines Device Configuration at Power-up.
• Excellent Jitter Performance
• Integrated Frequency Synthesizer Including PLL, Multiple VCOs, and Loop Filter:
  • Full Programmability Facilitates Phase Noise Performance Optimization
    Enabling Jitter Cleaner Mode
  • Programmable Charge Pump Gain and Loop Filter Settings
  • Unique Dual-VCO Architecture Supports a Wide Tuning Range 1.750 GHz – 2.356 GHz.
• Universal Output Blocks Support up to 2 Differential, 4 Single-Ended, or
  Combinations of Differential or Single-Ended:
  • 0.5 ps RMS (10 kHz to 20 MHz) Output Jitter Performance
  • Low Output Phase Noise: –130 dBc/Hz at 1 MHz offset, Fc = 491.52 MHz
  • Output Frequency Ranges From 10.94 MHz to 1.175 GHz in Synthesizer Mode
  • LVPECL, LVDS and LVCMOS
  • Independent Output Dividers Support Divide Ratios for 1, 2, 3, 4, 5, 8, 10,
    12, 16, 20, 24 and 32.
• Flexible Inputs With Innovative Smart Multiplexer Feature:
  • Two Universal Differential Inputs Accept Frequencies from 1 MHz up to
    500 MHz (LVPECL), 500 MHz (LVDS), or 250 MHz (LVCMOS).
  • One Auxiliary Input Accepts Crystals in the Range of 2MHz–42MHz
  • Clock Generator Mode Using Crystal Input

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